PQC Software Libraries

for High-Assurance,
Real-World Deployment

Pure Software PQC,
Hardened Against Physical Attacks

Secure Today’s Devices. Adapt Them for Tomorrow.

PQC must do more than withstand quantum attacks. It must withstand physical attacks, fit real hardware constraints, and remain adaptable throughout long device lifecycles.

Conventional PQC can be too large, too slow, or too exposed to physical attacks for real-world devices. FortifyIQ makes physical-attack protected PQC practical, including where silicon redesign is not an option.

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Supported Algorithms:

NIST standards:

ML-KEM | ML-DSA

Additional standards by request:

XMSS | XMSS-MT | LMS | LMS/HSS

Why FortiPQC Software Libraries

Exceptional Efficiency

FortifyIQ's proprietary mathematical approach to SCA/FIA protection (patented) enables high-assurance cryptography with exceptionally low implementation overhead. 

Straightforward Integration

Standard Interfaces & unified SW/HW API  simplify both integration and SW/HW migration.

ACVP/CAVP Validation

On your choice of hardware. (Usually within three days)

Configurable for Real Hardware

Tuned to target requirements, from constrained devices to high-throughput systems. 

Deploy PQC Without New Silicon

Pure software deployment without a hardware accelerator, including on fielded devices. 

Crypto-Agility Across the Lifecycle

Parameters, protections, and algorithms are upgradable in pure software.

Use Cases

Validated High Assurance Security

  • 3rd Party High-Assurance Validation
  • ML-KEM-SW, ML-DSA -SW (in process)
  • Side-Channel and Fault Injection Resistance Testing
  • TVLA and real-world attack testing
  • Highly Constrained & Legacy Devices

    PQC signature verification in fielded devices that have minimal memory and compute.
  • Embedded & Edge Systems

    Physically protected PQC across MCUs, SoCs, and embedded processors.
  • High-Performance Applications

    High-throughput PQC software when hardware acceleration is unavailable or not needed.
  • Regulated & High-Assurance Systems
    PQC with the security and assurance required for regulated products and critical systems. Designed to support the highest levels of FIPS 140-3, SESIP, and Common Criteria, including EAL5+.
Secure Systems Boutique
Secure Systems Boutique
FortiPQC Post-Quantum Cryptography Implementations

High-efficiency post-quantum cryptographic libraries with validated SCA/FIA resistance, for deployment on legacy or hardware-unprotected systems, configured per device for constrained memory through high performance. They support standardized PQC algorithms with full  OTA crypto-agility and offer a unified API enabling a seamless path to hardware and hybrid HW/SW deployments.

Post-Quantum Cryptographic Libraries

FIQ-PQC05-SW
SLH-DSA Hardened Stateless Hash-Based Signature Cryptographic Library
FIQ-PQC06-SW
XMSS Hardened Stateful Hash-Based Signature Cryptographic Library
FIQ-PQC07-SW
XMSS-MT Hardened Stateful Hash-Based Signature Cryptographic Library
FIQ-PQC08-SW
LMS Hardened Stateful Hash-Based Signature Cryptographic Library
FIQ-PQC09-SW
LMS/HSS Hardened Stateful Hash-Based Signature Cryptographic Library
Datasheets available upon request

Discover FortiPQC
Hardware Solutions

FortiPQC HW provides a comprehensive suite of post-quantum cryptography hardware, including CryptoBoxes, and IP cores. Our CryptoBoxes support both classical and post-quantum algorithms, making them ideal for the migration period when interoperability with existing systems is required.

Why Choose FortifyIQ for PQC

Ultra-efficient hybrid cryptographic IP cores combining classical and post-quantum algorithms in a single design.
Secure Systems Boutique
SGS certification logo
FortifyIQ AES Algorithm
AVA_VAN.5 Evaluation & Validation Summary
SGS Brightsight Common Criteria Laboratory
“Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”
“The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own”
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